1. Field of the Invention
The present invention relates to a semiconductor device and a semiconductor integrated circuit, in particular, to an MIS (Metal Insulator Semiconductor) semiconductor device manufactured by using an SOI (Silicon On Insulator) device, for example, formed on an insulating film, and a semiconductor integrated circuit using the semiconductor device.
2. Description of the Related Art
In the field of MIS semiconductor devices, SOI devices attract a great deal of attention, since they have merits such as reduced parasitic capacitance and improved device current driving ability, and thus can realize a high-speed low power consumption LSI (Large Scale Integrated circuit). An SOI device also has other advantages such as being latch-up free and reducing soft errors, and thus has many merits in comparison with a bulk device that is the mainstream in the conventional art.
In present LSIs, a continuous clock signal is generated internally, and an operation of each circuit block is controlled in synchronization with the clock signal. However, the power required for continuously generating a clock signal is the dominant factor in the total power consumption of an LSI. Therefore, to reduce the power consumption of the whole LSI, it is very important to reduce the power consumed by the clock signals. Thus, a “Gated Clock circuit” attracts attention, which is a circuit connected to an unused circuit block for stopping a circuit that controls a clock signal from issuing a clock signal, and only generating a clock signal when necessary.
FIG. 7 schematically shows a function block of an LSI, which has a gated clock circuit. As shown in FIG. 7, a clock signal is supplied from a clock signal source 31 to clock distribution circuits 32a to 32e. The clock distribution circuits 32a to 32e supply a clock signal to respective function circuits 33a to 33e. When the function circuits 33a to 33e are in standby states, the clock distribution circuits stop supply of a clock signal to the standby function circuits, in response to a control signal (not shown).
In the future, a combination of the above SOI device technique with a gated clock circuit is expected to make a large contribution to lowering of power consumption of LSI's.
In the meantime, existing SOI MISFET (Metal Insulator Semiconductor Field Effect Transistor) devices are classified roughly into two types, that is, “Fully-Depleted” devices and “Partially-Depleted” devices. Fully-Depleted devices are of a type in which a semiconductor layer (body region) is fully depleted. In partially-depleted devices, a semiconductor layer is only partially depleted. Further, the term “partially-depleted device” indicates a transistor in which a semiconductor layer (body region) is only partially depleted when the transistor is on state.
Devices of these two types have respective merits and demerits, and it is desirable to select one of them according to the properties required of the circuit. However, under the present circumstances, it is technically difficult to control the film thickness of the SOI active layer of a fully-depleted device, in comparison with that of a partially-depleted device. Further, in the case of adopting a fully-depleted device, the threshold voltage of the transistor is dependent on fewer factors, such as film thickness of an SOI and film thickness of a gate insulating film. A limited choice of factors determining the threshold voltage makes it difficult to make various threshold values, although it has been recently required to make transistors with various threshold values. Further, there is a high demand for using a partially-depleted device in a circuit at present, since it also has a high driving power.
However, in a partially-depleted SOI device formed on an insulating film, it is difficult to form a well as in a conventional bulk device and fix its potential. Therefore, it is reported that there is the problem that the “body region” of the device comes into an electrically floating state, and thus the potential of the body region readily changes, which causes large fluctuations in the device properties (F. Assaderaghi et al., 1996 Symposium on VLSI Technology Digest of Technical Papers, p122).
As an example, the case where a gated clock circuit as described above is manufactured by using a partially-depleted SOI device will now be explained. The body potential of the device in a stopped state is determined by balance of a pn junction current flowing between its source, drain and body region. In the meantime, when the circuit starts operation, the body potential of the device transiently fluctuates due to the influence of capacitive coupling existing between the gate, source, drain and body region in addition to influence of the pn junction current. Although the body voltage directly after start of circuit operation is influenced by the potential (charge) in the stopped state of the circuit, the potential changes as the operation continues, and changes to a certain fixed value in the end. Therefore, until the body potential reaches a predetermined value, a drain current of the device fluctuates due to fluctuations of the body potential of the device. As a result, it causes a problem of fluctuations of the frequency of a clock signal supplied to circuits connected to the gated clock circuit (history effect).
Originally, the frequency of a clock signal generated in an LSI must be fixed. However, under the above conditions, a state continues wherein operation of the circuit block using the clock signal cannot be performed, until the frequency of the clock signal is fixed. Therefore, there is the problem that operation of an LSI delays.